Master’s Thesis: Evaluation of Soft-Switching Topologies for High-Efficiency Power Electronics

Background Three-phase inverters are used in a wide range of applications. They drive the motors in electric trains, heavy-duty vehicles and industrial drives, and they connect renewables to the grid. Wide-bandgap (WBG) semiconductors such as SiC and GaN can switch much faster than silicon. But if the inverter is hard switched at high frequency, switching losses, device stress and electromagnetic interference (EMI) grow quickly. Soft switching, meaning zero-voltage switching (ZVS) or zero-current switching (ZCS), makes each transition happen at near-zero voltage or current. This can almost eliminate switching losses and improve both efficiency and reliability. This thesis is part of Moore4Power (“More than Moore for Disruptive Innovations in Power Electronics”), a Horizon Europe project under the Chips Joint Undertaking. It brings together more than 60 European industrial and academic partners. In Moore4Power, RISE leads the exploration of modular power electronic architectures for soft-switched converters. RISE also develops soft-switching control strategies for three-phase propulsion inverters, for example in railway and heavy-duty vehicle applications. Description Most soft-switching research so far has focused on DC/DC converters, such as LLC resonant converters and phase-shifted full bridges. In three-phase inverters, soft switching is harder to achieve. The load current varies continuously over each fundamental period, the converter has to keep using standard PWM modulation, and any added auxiliary circuits must not eat up the efficiency gain. In this thesis you will investigate soft-switching topologies for three-phase voltage source inverters , model them in simulation, and compare them on efficiency and losses against a hard-switched reference. Candidate soft-switching approaches include: the auxiliary resonant commutated pole (ARCP) inverter resonant and quasi-resonant DC-link inverters zero-voltage transition (ZVT) variants, including hybrid 3-level ANPC-ZVT triangular current mode (TCM) ZVS operation The thesis should answer these questions: How large is the reduction in switching loss and the gain in overall efficiency compared with hard switching, and how does it change with load, power factor, switching frequency and device technology (SiC vs GaN)? What extra losses, component stress, part count and control complexity does each soft-switching circuit add? Is soft switching kept over the full fundamental period and load range, and can hybrid hard/soft switching or load-adaptive control extend it? How does each topology affect output waveform quality (THD), and is it compatible with standard modulation such as SPWM/SVPWM? Which topology is the best fit for a modular, scalable three-phase inverter building block? The expected outcome is a set of validated simulation models, a quantitative comparison of losses and efficiency, and a recommendation that feeds directly into RISE’s work in Moore4Power. Main Tasks Review the literature on soft-switching principles and three-phase inverter topologies. Define a common inverter specification covering DC-link voltage, output power, switching frequency, and load (an RL load or PMSM drive). Build a hard-switched reference model of the three-phase 2-level inverter. Design and dimension the selected soft-switching topologies: resonant components, auxiliary switches, device selection and commutation timing. Build simulation models in PLECS, Matlab/Simulink and/or SPICE, using datasheet-based loss models for the SiC/GaN devices. Check that ZVS/ZCS is achieved across the fundamental period, then map losses and efficiency across operating points. Break the losses down into conduction, switching, auxiliary-circuit and passive-component losses. Evaluate the trade-offs: efficiency, THD, component count, device stress, and how modular and scalable each topology is. If time allows, explore load-adaptive soft-switching control or hybrid switching strategies. Document the work in a thesis report and an oral presentation. You’ll have a supervisor at RISE, licences for the simulation tools. Qualifications You’re in the final year of an MSc programme in Electrical Engineering, Electric Power Engineering, Mechatronics or a similar field. You should have: Solid knowledge of power electronics Experience with circuit simulation, such as PLECS, LTspice/PSpice or MATLAB/Simulink You should have good written and spoken English. We value an analytical mindset, independence and good communication skills. Conditions Scope: 30 ECTS credits (full time) Start : January 2027, 1-2 students Location: Gothenburg Compensation: according to RISE’s Guidelines for thesis projects Supervisor: Lakshmi Priya Gandla Examiner: to be appointed at the student’s university The work is done within Moore4Power, and results may be shared with project partners according to the project’s rules. Welcome with your application! If you are interested in the project and have questions, please contact Lakshmi Priya Gandla ( lakshmi.priya.gandla@ri.se ). The last application date is November 6th. Selection and interviews will be conducted continuously during and after the application period.